The SZG-ADC-LT2264 is a dual 40 MSPS 12-bit ADC based on the Analog Devices LTC2264. The board is heavily influenced by the manufacturer’s evaluation board and features a 50Ω input with isolation transformer. In the default configuration, the sampling clock is driven by the FPGA with an option to provide an external single-ended clock source via SMA connector.
Dual 40 MSPS 12-bit ADC
Typical volume pricing approaches provide reduced pricing based on order quantity or annual quantity. Our step pricing model leverages your organization’s accumulated volume to help reduce your pricing as your deployment grows.
With Opal Kelly’s step pricing model, you are able to achieve lower pricing “steps” as your total volume increases. We keep track of your current step and apply this information to determine an adjusted price per unit.
Step pricing is a partnership. You provide forecast information about your requirements and, in turn, we use this forecast information to keep your supply chain running smoothly and deliver the same great product at a lower price. Step pricing is only available directly from Opal Kelly.
Email firstname.lastname@example.org for more information and to set up a step pricing agreement.
Features & Specifications
- SYZYGY Standard Peripheral
- Dual (2-channel) 40 MSPS 12-bit ADC
- ADC family is available to 125 MSPS and 14-bit resolution (contact email@example.com)
- LVDS output to the FPGA
- Ultralow jitter and no anti-alias filtering allows undersampling of IF frequencies
- Ideal for SDR (software-defined radio) applications