Year: 2023

Comparing HLS and HDL Implementations of the Fast Fourier Transform (FFT)

VHDL was introduced in 1981, followed by Verilog in 1984. Both were primarily introduced as a way to document and simulate the behavior of digital circuits. As the languages became standardized and more broadly adopted, tools became more affordable and capable, eventually leading to the use of these languages for circuit synthesis in the 1990’s […]

Pro Tip: Create Memory Interfaces Quickly with Vivado Board Files

AMD-Xilinx’s 7-Series and UltraScale Memory Interface Generators (MIG) are complex gateware and primitive instantiation generators for DDR memory. They can be configured with seemingly endless parameters, and because it implements a physical interface outside the FPGA, your board vendor is the appropriate source for this configuration. It can be a grueling process to manually enter […]

Pro Tip: Use a “Bus Slicer” to Ease FrontPanel Vivado IP Application

One shortcoming of graphical or schematic hardware descriptions is that ripping signals or subset busses from a larger bus can be cumbersome. AMD-Xilinx’s Slice IP Core can only slice off one signal/bus per instantiation of the IP Core and this quickly becomes unruly as the number of control signals increase. We recommend a custom RTL […]

Supply Chain Update (April 2023)

Lead times on many electronic components we use for our products continue to increase since our previous update in September. Large customer orders placed now can expect to have a lead time of 10 to 12 months. Click to view our current inventory status (2023-04-09). If you are using (or planning to use) Opal Kelly […]